Computer Science homework help. CS 1400 – Computer Organization I

Final Exam———– B type — 900 is an odd number

Due 11:59pm May 12th to Blackboard

Name: __________ 900#_________________________

Score: _________/40

Only electronic submission to blackboard is accepted. Please scan your answer and save everything as one file if you have multiple images generated from your scanner.

Open book, open note, open internet.

Collaboration with other students are not allowed.

You can contact the instructor by email or Teams message if any question was not clear.

Sharing answers with other students will result in a F for this course.

Students should report to the instructor if contacted by other students asking for “collaboration/sharing or comparing answers”.

Same wrong answers to certain questions will be considered as cheating.

1. Short Answer Questions

Show all the steps, simply giving the final answer gets 0 point.

(a) What’s your student ID number (900#)?

(b) Use the last two digits of your 900 number as a decimal number and convert it to a binary representation.

e.g. 900#: 9008881111-> last two digits 11-> binary representation 1011

e.g. 900#: 9008881101-> last two digits 01-> binary representation 1

(b) In binary numeration system, why do we need to use 7 bits to represent the decimal value of 64?

(c) There are two different ways to transfer data between the processor and peripheral device, open loop data transfer and closed loop data transfer.

What are the differences between these two data transfer approaches?

2. Boolean Algebra Questions

Show all the steps, simply giving the final answer gets 0 point.

Theorems you might need.

X+XY=X

X+X ̅Y=X+Y

XY+X ̅Z+YZ=XY+X ̅Z

(A+B) ̅=A ̅ B ̅ (de Morgan’s theorem)

(a) Simplify the following Boolean expression

AB+AB ̅C+BC

(b) Convert the following expression to be a product of sums by de Morgan’s theorem

A ̅B ̅ + AB

3. The following truth table describes a combinational logic circuit. A, B and C are the inputs. The F is the output of the circuit.

A B C F

0 0 0 0

0 0 1 0

0 1 0 0

0 1 1 0

1 0 0 1

1 0 1 1

1 1 0 1

1 1 1 1

(1) Write out the Boolean expression for output signal F as a sum of minterms.

(2) Simplify the Boolean expression (result from (1)).

(3) Draw the circuit (in the following box) of the simplified Boolean expression using the basic gate symbols we have learned.

4. Latches are often called level-sensitive flip-flops. The D latch is considered as transparent during the entire time when the enable (clock) signal is asserted.

(a) What is the difference between a D latch and a D flip-flop?

(b) Can you use D latches to make a falling edge triggered D flip-flop?

Explain how a D flip-flop can be made by D latches.

5. JK flip-flops are often used to build counters. The JK flip-flop will toggle the original output value when triggered by the clock signal if both the J,K inputs are connected with a constant “high”(logic 1). All the JK flip-flops in Figure 2 are negative edge triggered. All the initial values of Q2Q1Q0 are 1.

Figure 2. Counter

(a) Sketch the output waveforms forQ2 Q1 Q0. Write down the output binary value (Q_2 Q_1 Q_0: such as “000”, “001”) for each clock period on the figure.

(b) Describe the function of the counter (e.g. binary down counter counting from 7 to 0).

6. The MIPS processor has an ALU unit shown in the following figure. There are three-bits control signals sent to ALU circuit generated by the ALU decoder within the control unit.

Figure 3. ALU Unit

(a)What are the three-bits control signal values for implementing the instruction “sw”?

sw $rt, immed($rs) # store word to memory address [$rs]+immed

F_2=

F_1=

F_0=

(b) What are the three-bits control signal values for implementing the instruction “addi $s0, $s1, -1”?

Addi $s0, $s1, -1 # [$s0]=[$s1]-1

F_2=

F_1=

F_0=

7. Given the MIPS processor in Figure 4, if the control signal “MemWrite” in the processor has a stuck-at-0 fault (meaning that the signal is always 0, regardless of its intended value, the processor is not able to write to the memory). Which of the following instructions would fail? And why?

Figure 4. Single cycle processor

(1) lw $rt, immed($rs) # load word from memory address [$rs]+immed

(2) sw $rt, immed($rs) # store word to memory address [$rs]+immed

(3) add $rd, $rs, $rt #[Rd] = [Rs] + [Rt]

(4) addi $rd, $rs, -1 # a[Rd] = [Rs] – 1

Why?

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